When a memory data bus of an electronic system is designed and routed from a memory controller to the memory modules, it is common to “swizzle” the traces to optimize routing within a byte or nibble of data. Data swizzling refers to routing of data lines on a printed circuit board (PCB) where data bit ordering is different on the memory controller side and the memory module side.
FIG. 1 illustrates an example of data swizzling between a memory controller and a memory module. FIG. 1 offers a 4-bit example with only two bits swizzled. In an actual implementation any number of bits with any amount of swizzling can be supported. Lines for two data bits (D1 and D3) are connected directly between the corresponding pins of memory controller 120 and memory device 140. That is, data bit D1 and data bit D3 transmitted from memory controller 120 are received as data bit D1 and data bit D3, respectively, by memory device 140. Transmission from memory device 140 to memory controller 120 operates in the same manner.
The other two data bits (D0 and D2) are swizzled. In the example of FIG. 1, the line for the pin corresponding to data bit D0 of memory controller 120 is coupled with the pin corresponding to data bit D2 of memory device 140. Similarly, the line for the pin corresponding to data bit D2 of memory controller 120 is coupled with the pin corresponding to data bit D0 of memory device 140.
Thus, as data travels from memory controller 120 to memory device 140 it is swizzled by the data lines. As the data travels back from memory device 140 to memory controller 120 it is de-swizzled and the data received by memory controller 120 is correctly ordered and ready for use.
This approach to data swizzling has been effective in many situations. However, as systems increase in complexity and robustness, simple swizzling techniques may not be sufficient.